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AI / GPU Data Center Interconnect Architecture
AI and GPU-driven infrastructure is pushing interconnect design further than traditional servers ever required — more bandwidth, higher power density, and tighter thermal margins, all at once. Here's how connector and interconnect choices shape modern AI data center architecture.
PCIe & CEM Slot Connectors
PCIe CEM slots are the physical backbone of add-in card design — from GPUs and NICs to storage controllers. This hub breaks down slot keying, form factors, power delivery, and the signal integrity demands of PCIe Gen4 through Gen7, for engineers designing or specifying expansion-card hardware.
OCP Server Interconnects
Open Compute Project (OCP) hardware trades proprietary server design for open, standardized interconnects — from management modules and rack-level power busbars to AI accelerator baseboards and storage. Here's how these specifications shape real hardware decisions for engineers building on OCP platforms.
Dukosi opens sampling of DK-NFLNK, a contactless link between battery AFEs and the BMS
Dukosi has made its DK-NFLNK contactless communication solution available for sampling by key customers. Designed for batteries built on conventional multi-channel analog front-end (AFE) designs, Dukosi says DK-NFLNK eliminates traditional wiring and connectors by using a single bus antenna. The solution consists of two chips, the DK8503 Node and the DK8203 System Hub, plus the Dukosi API and... Read more »
Mini-D RF interconnects for board-to-board RF applications.
SV Microwave has introduced SMPM Mini-D RF Interconnects for board-to-board RF applications. The space-saving D-sub form factor delivers RF performance in a compact package. The Interconnects have an SMPM interface, […] The post Mini-D RF interconnects for board-to-board RF applications. appeared first on Electronics Weekly.
What’s the Difference Between Hermetically and Environmentally Sealed Connectors?
Hermetically sealed connectors differ from those sealed against environmental factors. When, where, and why should you choose one over the other?
AI Drives Larger, Denser Packaging, Raising New Challenges for Equipment Makers
At A*STAR’s Innovate Together 2026, industry experts explored packaging, hybrid bonding, optical interconnects, and process control for AI. The post AI Drives Larger, Denser Packaging, Raising New Challenges for Equipment Makers appeared first on EE Times.
PCIe 8.0 Over UCIe 3.0: Bringing A Proven Protocol Into The Chiplet Era
UCIe standardizes die-to-die communication within a package and allows PCIe traffic to traverse chiplet boundaries with seamless interoperability over standardized interconnects. The post PCIe 8.0 Over UCIe 3.0: Bringing A Proven Protocol Into The Chiplet Era appeared first on Semiconductor Engineering.
Managing Power, Performance and Reliability in the Chiplet Era
Next-gen AI accelerators, high-performance processors, and complex computing architectures depend heavily on advanced packaging. Bringing multiple dies, chiplets, high-bandwidth memory, and advanced interconnects together into a single 2.5D or 3D package yields massive performance gains. However, this design evolution… Read More The post Managing Power, Performance and Reliability in the Chiplet Era appeared first on SemiWiki.
Categories
All categories →AI Server & Data Center Connectors
02Application Spotlights
03Automotive Connectors
04Board-To-Board
05Cable Harness & Assemblies
06Connector Fundamentals
07FPC & FFC Connectors: Guides, Comparisons & Selection Tools
08Floating Connector
09High-Speed Connectors & Signal Integrity
10Interconnect Components
11Raw Cable
12Supply Chain & Sourcing
Latest Articles
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RoHS & REACH Compliance for Connectors: What "Compliant" Actually Requires
RoHS and REACH get conflated constantly, but a connector can be fully RoHS compliant and still carry a REACH disclosure obligation — they're separate regulations, checked separately.

IP Rating Chart: What IP65, IP67, IP68, and IP69K Actually Mean
IP69K isn't a "better" version of IP68 — it tests a completely different hazard (high-pressure hot water jets vs. static submersion). Quick-reference chart for every digit, plus the combinations that actually show up on connector datasheets.

Application Spotlight: Choosing Connectors for an OCP ORv3 AI Accelerator Rack
Six different OCP connector standards, one rack. A composite walkthrough of how a GPU accelerator baseboard, network I/O, management, power, and storage interconnects actually fit together in an ORv3 AI build — and why each one was chosen over the alternative.

MIL-DTL-38999 Connectors Explained: Series I–IV Compared
Series I through IV aren't just size variants — each one couples differently (bayonet, triple-start thread, or breech-lock), which is usually the first thing to nail down before comparing anything else.

What Does UL 94 Mean? Flammability Rating Guide for Connector Housings
A UL 94 rating only applies to the specific thickness and color it was tested at — what V-0 through 5VA actually require, and why a glow-wire rating isn't the same thing.

Molex Micro-Fit vs. Hirose: What Actually Qualifies as a Second Source
Hirose is a second source for Micro-Fit" usually means one of two very different things — a same-footprint equivalent, or a full redesign wearing a comparison page's conclusion as cover. Here's how to tell which one you're actually doing.



